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High CMR, High Speed Optocouplers Technical Data
HCPL-4504 HCPL-0454 HCNW4504
Features
* Short Propagation Delays for TTL and IPM Applications * 15 kV/s Minimum Common Mode Transient Immunity at VCM = 1500 V for TTL/Load Drive * High CTR at TA = 25C >25% for HCPL-4504/0454 >23% for HCNW4504 * Electrical Specifications for Common IPM Applications * TTL Compatible * Guaranteed Performance from 0C to 70C * Open Collector Output * Safety Approval UL Recognized - 2500 V rms for 1 minute (5000 V rms for 1 minute for HCPL-4504#020 and HCNW4504)per UL1577 CSA Approved VDE 0884 Approved -VIORM = 630 V peak for HCPL-4504#060 -VIORM = 1414 V peak for HCNW4504 BSI Certified (HCNW4504) * Available in 8-Pin DIP, SO-8, Widebody Packages
Applications
* Inverter Circuits and Intelligent Power Module (IPM) interfacing High Common Mode Transient Immunity (> 10 kV/s for an IPM load/drive) and (tPLH - tPHL) Specified (See Power Inverter Dead Time section) * Line Receivers Short Propagation Delays and Low Input-Output Capacitance * High Speed Logic Ground Isolation - TTL/TTL, TTL/ CMOS, TTL/LSTTL * Replaces Pulse Transformers Save Board Space and Weight * Analog Signal Ground Isolation Integrated Photodetector Provides Improved Linearity over Phototransistors
Description
These optocouplers are similar to HP's other high speed transistor optocouplers but with shorter propagation delays and higher CTR. The HCPL-4504/0454 and HCNW4504 also have a guaranteed propagation delay difference (tPLH - tPHL). These features make these optocouplers an excellent solution to IPM inverter dead time and other switching problems.
Functional Diagram
NC 1 ANODE 2 CATHODE 3 NC 4 8 VCC 7 NC 6 VO 5 GND TRUTH TABLE LED VO ON LOW OFF HIGH
A 0.1 F bypass capacitor between pins 5 and 8 is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
5965-3604E
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The HCPL-4504/0454 and HCNW4504 CTR, propagation delay, and CMR are specified for both TTL and IPM load/drive conditions. Specifications and typical performance plots for both TTL and IPM conditions are provided for ease of application.
These single channel, diodetransistor optocouplers are available in 8-Pin DIP, SO-8, and Widebody package configurations. An insulating layer between a LED and an integrated photodetector provide electrical insulation between input and output. Separate connections for
the photodiode bias and outputtransistor collector increase the speed up to a hundred times that of a conventional phototransistor coupler by reducing the base collector capacitance.
Selection Guide
Single Channel Packages 8-Pin DIP (300 Mil) HCPL-4504 Small Outline SO-8 HCPL-0454 Widebody (400 Mil) HCNW4504
Ordering Information
Specify Part Number followed by Option Number (if desired). Example: HCPL-4504#XXX 020 = UL 5000 V rms/1 Minute Option* 060 = VDE 0884 VIORM = 630 V peak Option* 300 = Gull Wing Surface Mount Option 500 = Tape and Reel Packaging Option Option data sheets available. Contact your Hewlett-Packard sales representative or authorized distributor for information.
*For HCPL-4504 only. Combination of Option 020 and Option 060 is not available. Gull wing surface mount option applies to through hole parts only.
Schematic
ICC
8
VCC
+ ANODE 2 VF CATHODE - 3
IF
IO
6
VO
SHIELD
5
GND
1-34
Package Outline Drawings
8-Pin DIP Package (HCPL-4504)
9.65 0.25 (0.380 0.010) TYPE NUMBER 8 7 6 5 7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010)
OPTION CODE* DATE CODE
HP XXXXZ YYWW RU 1 1.19 (0.047) MAX. 2 3 4
UL RECOGNITION
1.78 (0.070) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002)
5 TYP. 4.70 (0.185) MAX.
0.51 (0.020) MIN. 2.92 (0.115) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES). * MARKING CODE LETTER FOR OPTION NUMBERS. "L" = OPTION 020 "V" = OPTION 060 OPTION NUMBERS 300 AND 500 NOT MARKED.
1.080 0.320 (0.043 0.013)
0.65 (0.025) MAX. 2.54 0.25 (0.100 0.010)
8-Pin DIP Package with Gull Wing Surface Mount Option 300 (HCPL-4504)
PAD LOCATION (FOR REFERENCE ONLY) 9.65 0.25 (0.380 0.010)
8 7 6 5
1.016 (0.040) 1.194 (0.047)
4.826 TYP. (0.190) 6.350 0.25 (0.250 0.010) 9.398 (0.370) 9.906 (0.390)
1
2
3
4
1.194 (0.047) 1.778 (0.070) 1.780 (0.070) MAX. 9.65 0.25 (0.380 0.010) 7.62 0.25 (0.300 0.010)
0.381 (0.015) 0.635 (0.025)
1.19 (0.047) MAX.
4.19 MAX. (0.165)
+ 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002)
1.080 0.320 (0.043 0.013) 0.635 0.130 2.54 (0.025 0.005) (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
0.635 0.25 (0.025 0.010)
12 NOM.
1-35
Small Outline SO-8 Package (HCPL-0454)
8
7
6
5
3.937 0.127 (0.155 0.005)
XXX YWW
5.842 0.203 (0.236 0.008) TYPE NUMBER (LAST 3 DIGITS) DATE CODE
4
1
2
3
0.381 0.076 (0.016 0.003)
1.270 BSG (0.050) 7 0.432 (0.017)
5.080 0.127 (0.200 0.005)
45 X
3.175 0.127 (0.125 0.005)
1.524 (0.060) 0.152 0.051 (0.006 0.002)
0.228 0.025 (0.009 0.001)
DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
0.305 MIN. (0.012)
8-Pin Widebody DIP Package (HCNW4504)
11.15 0.15 (0.442 0.006)
8 7 6 5
11.00 MAX. (0.433) 9.00 0.15 (0.354 0.006) TYPE NUMBER
HP HCNWXXXX YYWW
DATE CODE
1
2
3
4
1.55 (0.061) MAX.
10.16 (0.400) TYP. 7 TYP. + 0.076 0.254 - 0.0051 + 0.003) (0.010 - 0.002) 5.10 MAX. (0.201)
3.10 (0.122) 3.90 (0.154) 2.54 (0.100) TYP. 1.78 0.15 (0.070 0.006) 0.40 (0.016) 0.56 (0.022)
0.51 (0.021) MIN.
DIMENSIONS IN MILLIMETERS (INCHES).
1-36
8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300 (HCNW4504)
11.15 0.15 (0.442 0.006)
8 7 6 5
PAD LOCATION (FOR REFERENCE ONLY)
6.15 (0.242)TYP. 9.00 0.15 (0.354 0.006) 12.30 0.30 (0.484 0.012)
1 2 3 4
1.3 (0.051) 1.55 (0.061) MAX. 12.30 0.30 (0.484 0.012) 11.00 MAX. (0.433)
0.9 (0.035)
4.00 MAX. (0.158)
1.78 0.15 (0.070 0.006) 2.54 (0.100) BSC 0.75 0.25 (0.030 0.010)
1.00 0.15 (0.039 0.006)
+ 0.076 0.254 - 0.0051 + 0.003) (0.010 - 0.002) 7 NOM.
DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
Solder Reflow Temperature Profile (HCPL-0454 and Gull Wing Surface Mount Option Parts)
260 240 220 200 180 160 140 120 100 80 60 40 20 0 0 T = 145C, 1C/SEC T = 115C, 0.3C/SEC
TEMPERATURE - C
T = 100C, 1.5C/SEC
1
2
3
4
5
6
7
8
9
10
11
12
TIME - MINUTES
Note: Use of nonchlorine activated fluxes is highly recommended.
1-37
Regulatory Information
The devices contained in this data sheet have been approved by the following organizations: UL Recognized under UL 1577, Component Recognition Program, File E55361.
CSA Approved under CSA Component Acceptance Notice #5, File CA 88324. VDE Approved according to VDE 0884/06.92 (HCNW4504 and HCPL-4504#060 only).
BSI Certification according to BS451:1994, (BS EN60065:1994); BS EN60950:1992 (BS7002:1992) and EN41003:1993 for Class II applications (HCNW4504 only).
Insulation and Safety Related Specifications
8-Pin DIP (300 Mil) Value 7.1 SO-8 Value 4.9 Widebody (400 Mil) Value Units 9.6 mm
Parameter Minimum External Air Gap (External Clearance) Minimum External Tracking (External Creepage) Minimum Internal Plastic Gap (Internal Clearance)
Symbol L(101)
Conditions Measured from input terminals to output terminals, shortest distance through air. Measured from input terminals to output terminals, shortest distance path along body. Through insulation distance, conductor to conductor, usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity. Measured from input terminals to output terminals, along internal cavity. DIN IEC 112/VDE 0303 Part 1
L(102)
7.4
4.8
10.0
mm
0.08
0.08
1.0
mm
Minimum Internal Tracking (Internal Creepage) Tracking Resistance (Comparative Tracking Index) Isolation Group CTI
NA
NA
4.0
mm
200
200
200
Volts
IIIa
IIIa
IIIa
Material Group (DIN VDE 0110, 1/89, Table 1)
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
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VDE 0884 Insulation Related Characteristics (HCPL-4504 OPTION 060 ONLY)
Description Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage 300 V rms for rated mains voltage 450 V rms Climatic Classification Pollution Degree (DIN VDE 0110/1.89) Maximum Working Insulation Voltage Input to Output Test Voltage, Method b* VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial Discharge < 5 pC Input to Output Test Voltage, Method a* VIORM x 1.5 = VPR, Type and sample test, tm = 60 sec, Partial Discharge < 5 pC Highest Allowable Overvoltage* (Transient Overvoltage, tini = 10 sec) Safety Limiting Values (Maximum values allowed in the event of a failure, also see Figure 15, Thermal Derating curve.) Case Temperature Input Current Output Power Insulation Resistance at TS, VIO = 500 V Symbol Characteristic I-IV I-III 55/100/21 2 630 1181 Units
VIORM VPR
V peak V peak
VPR
945
V peak
VIOTM
6000
V peak
TS IS,INPUT PS,OUTPUT RS
175 230 600 109
C mA mW
VDE 0884 Insulation Related Characteristics (HCNW4504 ONLY)
Description Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage 600 V rms for rated mains voltage 1000 V rms Climatic Classification Pollution Degree (DIN VDE 0110/1.89) Maximum Working Insulation Voltage Input to Output Test Voltage, Method b* VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial Discharge < 5 pC Input to Output Test Voltage, Method a* VIORM x 1.5 = VPR, Type and sample test, tm = 60 sec, Partial Discharge < 5 pC Highest Allowable Overvoltage* (Transient Overvoltage, tini = 10 sec) Safety Limiting Values (Maximum values allowed in the event of a failure, also see Figure 15, Thermal Derating curve.) Case Temperature Input Current Output Power Insulation Resistance at TS, VIO = 500 V Symbol Characteristic I-IV I-III 55/85/21 2 1414 2652 Units
VIORM VPR
V V
peak
peak
VPR
2121
V
peak
VIOTM
8000
V
peak
TS IS,INPUT PS,OUTPUT RS
150 400 700 109
C mA mW
*Refer to the front of the optocoupler section of the current catalog under Product Safety Regulations section (VDE 0884), for a detailed description. Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.
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Absolute Maximum Ratings
Parameter Storage Temperature Operating Temperature Symbol TS TA Min. -55 HCPL-4504 -55 HCPL-0454 HCNW4504 -55 HCPL-4504 HCPL-0454 HCNW4504 HCPL-4504 HCPL-0454 HCNW4504 HCPL-4504 HCPL-0454 HCNW4504 HCPL-4504 HCPL-0454 HCNW4504 Device Max. 125 100 85 25 50 40 1 0.1 5 3 45 40 8 16 30 20 100 Units C C Note
Average Forward Input Current Peak Forward Input Current (50% duty cycle, 1 ms pulse width) (50% duty cycle, 1 ms pulse width) Peak Transient Input Current ( 1 s pulse width, 300 pps) Reverse LED Input Voltage (Pin 3-2)
IF(AVG) IF(PEAK)
mA mA A
1 2
IF(TRANS)
VR
V
Input Power Dissipation
PIN
mW
3
Average Output Current (Pin 6) Peak Output Current Supply Voltage (Pin 8-5) Output Voltage (Pin 6-5) Output Power Dissipation Lead Solder Temperature (Through-Hole Parts Only) 1.6 mm below seating plane, 10 seconds up to seating plane, 10 seconds Reflow Temperature Profile
IO(AVG) IO(PEAK) VCC VO PO
-0.5 -0.5
mA mA V V mW
4
TLS TRP
HCPL-4504 HCNW4504 HCPL-0454 and Option 300
260 C 260 C See Package Outline Drawings section
1-40
Electrical Specifications (DC)
Over recommended temperature (TA = 0C to 70C) unless otherwise specified. See note 12.
Parameter Current Transfer Ratio Symbol CTR Device HCPL-4504 HCPL-0454 HCNW4504 HCPL-4504 HCPL-0454 HCNW4504 HCPL-4504 HCPL-0454 HCNW4504 Min. 25 21 23 19 26 22 25 21 Typ.* 32 34 29 31 35 37 33 35 0.2 0.2 0.003 0.01 50 0.02 HCPL-4504 HCPL-0454 HCNW4504 HCPL-4504 HCPL-0454 HCNW4504 HCPL-4504 HCPL-0454 HCNW4504 HCPL-4504 HCPL-0454 HCNW4504 1.5 1.45 1.35 5 3 -1.6 -1.4 60 70 1.59 Max. 60 60 63 65 65 68 0.4 0.5 0.4 0.5 0.5 1 50 200 1 2 1.7 1.8 1.85 1.95 Units Test Conditions % TA = 25C VO = 0.4 V IF = 16 mA, VO = 0.5 V VCC = 4.5 V TA = 25C VO = 0.4 V VO = 0.5 V % TA = 25C VO = 0.4 V IF = 12 mA, VO = 0.5 V VCC = 4.5 V TA = 25C VO = 0.4 V VO = 0.5 V V TA = 25C IO = 4.0 mA IF = 16 mA, VCC = 4.5 V IO = 3.3 mA TA = 25C IO = 3.6 mA IO = 3.0 mA A TA = 25C VO = VCC = 5.5 V IF = 0 mA TA = 25C VO = VCC = 15 V A A V IF = 16 mA, VO = Open, VCC = 15 V TA = 25C IF = 0 mA, VO = Open, VCC = 15 V TA = 25C IF = 16 mA TA = 25C IF = 16 mA V IR = 10 A Fig. 1, 2, 4 Note 5
Current Transfer Ratio
CTR
1, 2, 4
5
Logic Low Output Voltage
VOL
Logic High Output Current Logic Low Supply Current Logic High Supply Current Input Forward Voltage
IOH
5
ICCL ICCH VF
12 12 3
Input Reverse Breakdown Voltage Temperature Coefficient of Forward Voltage Input Capacitance
BVR
VF TA CIN
IR = 100 A, TA = 25C mV/C IF = 16 mA
pF
f = 1 MHz, VF = 0 V
*All typicals at TA = 25C.
1-41
AC Switching Specifications
Over recommended temperature (TA = 0C to 70C) unless otherwise specified.
Parameter Propagation Delay Time to Logic Low at Output Symbol tPHL 0.2 0.5 Min. Typ. 0.2 Max. Units 0.3 s TA = 25C Test Conditions Pulse: f = 20 kHz, Duty Cycle = 10%, IF = 16 mA, VCC = 5.0 V, RL = 1.9 k, CL = 15 pF, VTHHL = 1.5 V Pulse: f = 10 kHz, Duty Cycle = 50%, IF = 12 mA, VCC = 15.0 V, RL = 20 k, CL = 100 pF, VTHHL = 1.5 V Pulse: f = 20 kHz, Duty Cycle = 10%, IF = 16 mA, VCC = 5.0 V, RL = 1.9 k, CL = 15 pF, VTHLH = 1.5 V Pulse: f = 10 kHz, Duty Cycle = 50%, IF = 12 mA, VCC = 15.0 V, RL = 20 k, CL = 100 pF, VTHLH = 2.0 V Fig. 6, 8, 9 Note 9
0.2 0.1
0.5 0.5
0.7 1.0
TA = 25C
6, 10-14
10
Propagation Delay Time to Logic High at Output
0.3 tPLH 0.3
0.5 s 0.7
TA = 25C
6, 8, 9
9
0.3 0.2
0.8 0.8
1.1 1.4
TA = 25C
6, 10-14
10
Propagation Delay Difference Between Any 2 Parts Common Mode Transient Immunity at Logic High Level Output Common Mode Transient Immunity at Logic Low Level Output
-0.4 tPLH-tPHL -0.7
0.3 0.3
0.9 s 1.3
TA = 25C
Pulse: f = 10 kHz, 6, Duty Cycle = 50%, 10-14 IF = 12 mA, VCC = 15.0 V, RL = 20 k, CL = 100 pF, VTHHL = 1.5 V, VTHLH = 2.0 V VCC = 5.0 V, RL = 1.9 k, CL = 15 pF, IF = 0 mA 7
15
15 |CMH| 15
30 kV/s 30 VCM = 1500 VP-P TA = 25C
7, 9
VCC = 15.0 V, RL = 20 k, CL = 100 pF, IF = 0 mA VCC = 5.0 V, RL = 1.9 k, CL = 15 pF, IF = 16 mA
7
8, 10
15 |CML| 10
30 kV/s 30 VCM = 1500 VP-P TA = 25C
7
7, 9
VCC = 15.0 V, RL = 20 k, CL = 100 pF, IF = 12 mA VCC = 15.0 V, RL = 20 k, CL = 100 pF, IF = 16 mA
7
8, 10
15
30
7
7
8, 10
8, 10
*All typicals at TA = 25C.
1-42
Package Characteristics
Over recommended temperature (TA = 0C to 25C) unless otherwise specified. Parameter Input-Output Momentary Withstand Voltage Input-Output Resistance Sym. VISO Device HCPL-4504 HCPL-0454 HCNW4504 HCPL-4504 (Option 020) HCPL-4504 HCPL-0454 HCNW4504 HCPL-4504 HCPL-0454 HCNW4504 Min. 2500 5000 5000 1012 1012 1011 1013 0.6 0.5 0.6 pF VI-O = 500 Vdc TA = 25C TA = 100C f = 1 MHz Typ.* Max. Units V rms Test Conditions RH 50%, t = 1 min., TA = 25C Fig. Note 6, 13 6, 14 6, 11, 14 6
RI-O
Input-Output Capacitance
CI-O
6
*All typicals at TA = 25C.. The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Related Characteristics Table (if applicable), your equipment level safety specification or HP Application Note 1074 entitled "Optocoupler Input-Output Endurance Voltage."
Notes: 1. Derate linearly above 70C free-air temperature at a rate of 0.8 mA/C (8-Pin DIP). Derate linearly above 85C free-air temperature at a rate of 0.5 mA/C (SO-8). 2. Derate linearly above 70C free-air temperature at a rate of 1.6 mA/C (8-Pin DIP). Derate linearly above 85C free-air temperature at a rate of 1.0 mA/C (SO-8). 3. Derate linearly above 70C free-air temperature at a rate of 0.9 mW/C (8-Pin DIP). Derate linearly above 85C free-air temperature at a rate of 1.1 mW/C (SO-8). 4. Derate linearly above 70C free-air temperature at a rate of 2.0 mW/C (8-Pin DIP). Derate linearly above 85C free-air temperature at a rate of 2.3 mW/C (SO-8). 5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100. 6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together. 7. Under TTL load and drive conditions: Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dVCM /dt on the leading edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM /dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V). 8. Under IPM (Intelligent Power Module) load and LED drive conditions: Common mode transient immunity in a Logic High level is the maximum tolerable dVCM /dt on the leading edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 3.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable dVCM /dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 1.0 V). 9. The 1.9 k load represents 1 TTL unit load of 1.6 mA and the 5.6 k pull-up resistor. 10. The RL = 20 k, CL = 100 pF load represents an IPM (Intelligent Power Module) load. 11. See Option 020 data sheet for more information. 12. Use of a 0.1 F bypass capacitor connected between pins 5 and 8 is recommended. 13. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 3000 V rms for 1 second (leakage detection current limit, Ii-o 5 A). This test is performed before the 100% Production test shown in the VDE 0884 Insulation Related Characteristics Table, if applicable. 14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 6000 V rms for 1 second (leakage detection current limit, Ii-o 5 A). This test is performed before the 100% Production test shown in the VDE 0884 Insulation Related Characteristics Table, if applicable. 15. The difference between tPLH and tPHL between any two devices (same part number) under the same test condition. (See Power Inverter Dead Time and Propagation Delay Specifications section.)
1-43
HCPL-4504/0454 TA = 25C 10 VCC = 5.0 V
IO - OUTPUT CURRENT - mA
HCNW4504
40 mA
IO - OUTPUT CURRENT - mA
35 mA 30 mA 25 mA
TA = 25C 20 VCC = 5.0 V 18 16 14 12 10 8 6 4 2 0
40 mA 35 mA 30 mA 25 mA 20 mA 15 mA 10 mA IF = 5 mA
5
20 mA 15 mA 10 mA IF = 5 mA
0
0
10 VO - OUTPUT VOLTAGE - V
20
0
10 VO - OUTPUT VOLTAGE - V
20
Figure 1. DC and Pulsed Transfer Characteristics.
NORMALIZED CURRENT TRANSFER RATIO
1.5
NORMALIZED CURRENT TRANSFER RATIO
HCPL-4504/0454
HCNW4504 2.0 1.6 1.2 0.8 0.4 0 NORMALIZED IF = 16 mA VO = 0.4 V VCC = 5.0 V TA = 25C
1.0
0.5
0.0
NORMALIZED IF = 16 mA VO = 0.4 V VCC = 5.0 V TA = 25C 0 2 4 6 8 10 12 14 16 18 20 22 24 26 IF - INPUT CURRENT - mA
0
5
10
15
20
25
IF - INPUT CURRENT - mA
Figure 2. Current Transfer Ratio vs. Input Current.
HCPL-4504/0454 1000
IF - FORWARD CURRENT - mA IF - FORWARD CURRENT - mA
HCNW4504 1000 TA = 25C 100 10 1.0 0.1 0.01 0.001 1.2 IF + VF -
100 10 1.0 0.1 0.01 0.001 1.1
IF + VF -
TA = 25C
1.2
1.3
1.4
1.5
1.6
1.3
1.4
1.5
1.6
1.7
VF - FORWARD VOLTAGE - VOLTS
VF - FORWARD VOLTAGE - VOLTS
Figure 3. Input Current vs. Forward Voltage.
1-44
NORMALIZED CURRENT TRANSFER RATIO
NORMALIZED CURRENT TRANSFER RATIO
IOH - LOGIC HIGH OUTPUT CURRENT - nA
HCPL-4504/0454 1.1 1.0
HCNW4504 1.05 NORMALIZED I F = 16 mA VO = 0.4 V VCC = 5.0 V TA = 25C
10 4 10 3 10 2 10 1 10 0 10-1 10-2 -60 -40 -20
1.0
IF = 0 mA VO = VCC = 5.0 V
0.9 NORMALIZED I F = 16 mA VO = 0.4 V VCC = 5.0 V TA = 25C
0.95
0.8
0.7
0.9
0.6 -60 -40 -20 0
20 40 60 80 100 120
0.85 -60 -40 -20 0
20 40 60 80 100 120
0
20 40 60 80 100 120
TA - TEMPERATURE - C
TA - TEMPERATURE - C
TA - TEMPERATURE - C
Figure 4. Current Transfer Ratio vs. Temperature.
Figure 5. Logic High Output Current vs. Temperature.
IF 0 VO VTHHL VCC
PULSE GEN. ZO = 50 t r = 5 ns
IF
1 2 3
8 7 6 0.1F 5 RL
VCC
VTHLH VOL I F MONITOR RM
VO
4
CL
t PHL
t PLH
Figure 6. Switching Test Circuit.
VCM 0V tr 10%
1 90% 90% 10% tf B A 3 4 VFF IF 2
8 7 6 0.1F 5 RL
VCC
VO
VO SWITCH AT A: IF = 0 mA VO SWITCH AT B: IF = 12 mA, 16 mA
VCC
CL VCM + - PULSE GEN.
VOL
Figure 7. Test Circuit for Transient Immunity and Typical Waveforms.
1-45
HCPL-4504/0454 0.50
tp - PROPAGATION DELAY - s tp - PROPAGATION DELAY - s
HCNW4504 0.50
tp - PROPAGATION DELAY - s
1.4 1.2
VCC = 5.0 V 0.45 RL = 1.9 k CL = 15 pF 0.40 V THHL = VTHLH = 1.5 V 10% DUTY CYCLE 0.35 t PHL 0.30 0.25 0.20 0.15 0.10 -60 -40 -20 0 IF = 10 mA IF = 16 mA
tPLH
VCC = 5.0 V 0.45 RL = 1.9 k CL = 15 pF 0.40 V THHL = VTHLH = 1.5 V 10% DUTY CYCLE 0.35 0.30 t PHL 0.25 0.20 0.15 0.10 -60 -40 -20 0 IF = 10 mA IF = 16 mA
tPLH
VCC = 5.0 V TA = 25 C CL = 15 pF 1.0 VTHHL = VTHLH = 1.5 V 10% DUTY CYCLE 0.8 0.6 0.4 0.2 0.0 t PHL IF = 10 mA IF = 16 mA
tPLH
20 40 60 80 100 120
20 40 60 80 100 120
0
2
4
6
8 10 12 14 16 18 20
TA - TEMPERATURE - C
TA - TEMPERATURE - C
RL - LOAD RESISTANCE - k
Figure 8. Propagation Delay Time vs. Temperature.
Figure 9. Propagation Delay Time vs. Load Resistance.
2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
tp - PROPAGATION DELAY - s
tp - PROPAGATION DELAY - s
t PLH
tp - PROPAGATION DELAY - s
VCC = 5.0 V TA = 25 C CL = 100 pF VTHHL = 1.5 V VTHLH = 2.0 V 50% DUTY CYCLE t PLH IF = 10 mA IF = 16 mA
1.1
VCC = 15.0 V 1.0 RL = 20 k CL = 100 pF 0.9 VTHHL = 1.5 V VTHLH = 2.0 V 0.8 0.7 0.6 0.5 tPHL 0.4 0.3 -60 -40 -20 0
IF = 10 mA IF = 16 mA
1.8
50% DUTY CYCLE
VCC = 15.0 V 1.6 TA = 25 C CL = 100 pF 1.4 VTHHL = 1.5 V 1.2 VTHLH = 2.0 V 50% DUTY CYCLE 1.0 0.8 0.6 0.4 0.2 0.0 0 IF = 10 mA IF = 16 mA t PHL
t PLH
t PHL
0
2
4
6
8 10 12 14 16 18 20
20 40 60 80 100 120
5 10 15 20 25 30 35 40 45 50 RL - LOAD RESISTANCE - k
RL- LOAD RESISTANCE - k
TA - TEMPERATURE - C
Figure 10. Propagation Delay Time vs. Load Resistance.
Figure 11. Propagation Delay Time vs. Temperature.
Figure 12. Propagation Delay Time vs. Load Resistance.
3.5
tp - PROPAGATION DELAY - s
tp - PROPAGATION DELAY - s
VCC = 15.0 V 3.0 TA = 25 C RL = 20 k 2.5 VTHHL = 1.5 V VTHLH = 2.0 V 2.0 50% DUTY CYCLE 1.5 1.0 0.5 0.0
1.2
t PLH
1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 t PHL t PLH
TA = 25 C RL = 20 k CL = 100 pF VTHHL = 1.5 V VTHLH = 2.0 V 50% DUTY CYCLE
t PHL
IF = 10 mA IF = 16 mA
0 100 200 300 400 500 600 700 800 900 1000
IF = 10 mA IF = 16 mA
0.2 10 11 12 13 14 15 16 17 18 19 20 VCC - SUPPLY VOLTAGE - V
RL - LOAD CAPACITANCE - pF
Figure 13. Propagation Delay Time vs. Load Capacitance.
Figure 14. Propagation Delay Time vs. Supply Voltage.
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OUTPUT POWER - PS, INPUT CURRENT - IS
800 700 600 500 400 300 (230) 200 100 0 0 25
HCPL-4504 OPTION 060 PS (mW) IS (mA)
HCPL-4504/0454 HCNW4504 LED 1 2 8 7 6 3 OUT 1 5 BASE/GATE DRIVE CIRCUIT Q1 +HV +
50
75 100 125 150 175 200
HCPL-4504/0454 HCNW4504 LED 2 2 8 7 6 3
+
TS - CASE TEMPERATURE - C
OUTPUT POWER - PS, INPUT CURRENT - IS
1000 900 800 700 600 500 400 300 200 100 0 0 25 50
HCNW4504 PS (mW) IS (mA)
OUT 2 5
BASE/GATE DRIVE CIRCUIT
Q2
Figure 16. Typical Power Inverter.
-HV
75
100 125 150 175
TS - CASE TEMPERATURE - C
Figure 15. Thermal Derating Curve, Dependence of Safety Limiting Valve with Case Temperature per VDE 0884.
LED 1
Power Inverter Dead Time and Propagation Delay Specifications
The HCPL-4504/0454 and HCNW4504 include a specification intended to help designers minimize "dead time" in their power inverter designs. The new "propagation delay difference" specification (tPLH - tPHL) is useful for determining not only how much optocoupler switching delay is needed to prevent "shootthrough" current, but also for determining the best achievable worst-case dead time for a given design. When inverter power transistors switch (Q1 and Q2 in Figure 17), it is essential that they never
OUT 1
tPLH min (tPLH max-tPLH min) tPLH max TURN-ON DELAY (tPLH max-tPLH min ) LED 2
OUT 2 tPHL min (tPHL max-tPHL min) tPHL max
MAXIMUM DEAD TIME
Figure 17. LED Delay and Dead Time Diagram.
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conduct at the same time. Extremely large currents will flow if there is any overlap in their conduction during switching transitions, potentially damaging the transistors and even the surrounding circuitry. This "shootthrough" current is eliminated by delaying the turn-on of one transistor (Q2) long enough to ensure that the opposing transistor (Q1) has completely turned off. This delay introduces a small amount of "dead time" at the output of the inverter during which both transistors are off during switching transitions. Minimizing this dead time is an important design goal for an inverter designer. The amount of turn-on delay needed depends on the propagation delay characteristics of the optocoupler, as well as the characteristics of the transistor base/gate drive circuit. Considering only the delay characteristics of the optocoupler (the characteristics of the base/gate drive circuit can be analyzed in the same way), it is important to know the minimum and maximum turn-on (tPHL) and turn-off (tPLH) propagation delay specifications, preferably over the desired operating temperature range. The importance of these specifications is illustrated in Figure 17. The waveforms labeled "LED1", "LED2", "OUT1", and "OUT2" are the input and output voltages of the optocoupler circuits driving Q1 and Q2 respectively. Most inverters are designed such that the power transistor turns on when the optocoupler LED turns on; this ensures that both power transistors will be off in the event of a power loss in the control circuit. Inverters can also be designed such that the power
transistor turns off when the optocoupler LED turns on; this type of design, however, requires additional fail-safe circuitry to turn off the power transistor if an over-current condition is detected. The timing illustrated in Figure 17 assumes that the power transistor turns on when the optocoupler LED turns on. The LED signal to turn on Q2 should be delayed enough so that an optocoupler with the very fastest turn-on propagation delay (tPHLmin) will never turn on before an optocoupler with the very slowest turn-off propagation delay (tPLHmax) turns off. To ensure this, the turn-on of the optocoupler should be delayed by an amount no less than (tPLHmax - tPHLmin), which also happens to be the maximum data sheet value for the propagation delay difference specification, (tPLH - tPHL). The HCPL-4504/0454 and HCNW4504 specify a maximum (tPLH - tPHL) of 1.3 s over an operating temperature range of 0-70C. Although (tPLH-tPHL)max tells the designer how much delay is needed to prevent shoot-through current, it is insufficient to tell the designer how much dead time a design will have. Assuming that the optocoupler turn-on delay is exactly equal to (tPLH - tPHL)max, the minimum dead time is zero (i.e., there is zero time between the turn-off of the very slowest optocoupler and the turn-on of the very fastest optocoupler). Calculating the maximum dead time is slightly more complicated. Assuming that the LED turn-on delay is still exactly equal to (tPLH - tPHL)max, it can be seen in Figure 17 that the maximum dead
time is the sum of the maximum difference in turn-on delay plus the maximum difference in turnoff delay, [(tPLHmax-tPLHmin)+(tPHLmax-tPHLmin)]. This expression can be rearranged to obtain [(tPLHmax-tPHLmin)-(tPHLmin-tPHLmax)], and further rearranged to obtain [(tPLH-tPHL)max-(tPLH-tPHL)min], which is the maximum minus the minimum data sheet values of (tPLH-tPHL). The difference between the maximum and minimum values depends directly on the total spread in propagation delays and sets the limit on how good the worst-case dead time can be for a given design. Therefore, optocouplers with tight propagation delay specifications (and not just shorter delays or lower pulse-width distortion) can achieve short dead times in power inverters. The HCPL-4504/0454 and HCNW4504 specify a minimum (tPLH - tPHL) of -0.7 s over an operating temperature range of 0-70C, resulting in a maximum dead time of 2.0 s when the LED turn-on delay is equal to (tPLH-tPHL)max, or 1.3 s. It is important to maintain accurate LED turn-on delays because delays shorter than (tPLH - tPHL)max may allow shootthrough currents, while longer delays will increase the worst-case dead time.
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